1. The power of assertions in SystemVerilog
Author: Eduard Cerny ... ]et al.[
Library: Library and Documentation Center of Kurdistan University (Kurdistan)
Subject: ، Verilog )Computer hardware description language(,، Integrated circuits, Verification, Data processing
Classification :
TK
7874
.
58
.
P69
2010
2. The power of assertions in system verilog
Author: / Eduard Cerny...[et al]
Library: University of Tabriz Library, Documentation and Publication Center (East Azarbaijan)
Subject: Verilog (Computer hardware description language),Integrated circuits - Verification - Data processing
Classification :
TK7874
.
58
.
P69
2010
3. The power of assertions in system verilog
Author: Eduard Cerny ... ]et al.[
Library: Central Library and Information Center of Ferdowsi University of Mashhad (Khorasan Razavi)
Subject: ، Verilog )Computer hardware description language(,Verification -- Data processing ، Integrated circuits
Classification :
TK
7874
.
58
.
P69
2010
